Memory segmentation in 8086

Memory segmentation in 8086

By using our site, you acknowledge that you have read and understand our Cookie PolicyPrivacy Policyand our Terms of Service. Software Engineering Stack Exchange is a question and answer site for professionals, academics, and students working within the systems development life cycle. It only takes a minute to sign up. Inmapping of logical adderss to physical address is done with the help of segmentation. When logical address are genereted?

When program starts to run? Is segmentation mapping something logically smaller to something bigger? If this is so, what's the purpose? To me it seems the opposite of virtual addressing which maps a bigger virtual address space to a smaller physical ram. It is a physical addressing scheme that takes into account the limitation of the registers to the 16 bits of the processor architecture, while offering a larger address bus.

A better approach would perhaps have been to have 20 bit address registers, or a 32 bit address bus and combine 2 registers for making one address register. It was technically feasible, because Motorola processor jdm engines near me had this nicer approach. Butthis would have made the much more expensive. The compiler had to take into account the addressing scheme through the concept of memory model.

For example:. Between those extremes you had mixed models, in which either data or code was bound to a single segment of 64k. From what I remember it was a painful scheme. Libraries had to be produced and shipped for each model. And lots of limitations: pointer arithmetic, array addressing, and memory allocation were bound to fit in 64k, even in large model.

Now if you want to understand this better, you'll have to look at the instruction set, and read about the memory models. Sign up to join this community. The best answers are voted up and rise to the top. Home Questions Tags Users Unanswered. Asked 3 years, 1 month ago.By using our site, you acknowledge that you have read and understand our Cookie PolicyPrivacy Policyand our Terms of Service. The dark mode beta is finally here. Change your preferences any time. Stack Overflow for Teams is a private, secure spot for you and your coworkers to find and share information.

The question is: "Why? Why do we need the Extra Segment? Why 4? I know the question may sound dull, but I found this question in one of the 'Microprocessor Architectures' exams given last year at my college.

First, let's assume that we are on board with the decision to use a segmented architecture the fact that there are segments in the first place. The "why" of that decision would be out of scope. The more segment registers you have, the more complex the circuitry becomes, the more space it takes on the chip and the more expensive it gets; so you don't necessarily want to throw in dozens of them if they will go idle most of the time 1.

How many do you need? You can't temporarily "change CS" to access data on another part of the memory because CS is where your code is running. With only one register, no program would be able to access memory located more than 64kb away from the code and realistically a lot less. You definitely need at least one data segment DS. Can you use one of those two for the stack? Yes, but again at a high cost. Using DS severely limits the program's ability to use more than 64kb of data.

The stack segment is usually global to the program, so if it were located on the DS, you couldn't change DS without losing the stack, and you wouldn't be able to make CALLs until you got back to the "main" DS.

Using the CS has a similar problem. So, you need a dedicated SS. Note that you could also decide to fix the stack to be at a certain hardcoded memory location and you would not need an explicit SS.

That's valid, and I believe some architectures did that, but you lose the flexibility to allocate a smaller stack when a large one would be wasteful, or even fancier techniques like using multiple stacks.The Intel introduced a second version of segmentation in that added support for virtual memory and memory protection. At this point the original model was renamed real modeand the new version was named protected mode. The x architecture, introduced inhas largely dropped support for segmentation in bit mode.

In both real and protected modes, the system uses bit segment registers to derive the actual memory address. The Intelintroduced inadds two additional segment registers, FS and GS, with no specific uses defined by the hardware.

The way in which the segment registers are used differs between the two modes. The choice of segment is normally defaulted by the processor according to the function being executed. Instructions are always fetched from the code segment.

Memory Segmentation of 8086

Any stack push or pop or any data reference referring to the stack uses the stack segment. All other references to data use the data segment.

FS and GS have no hardware-assigned uses. The instruction format allows an optional segment prefix byte which can be used to override the default segment for selected instructions if desired. The bit segment selector in the segment register is interpreted as the most significant 16 bits of a linear bit address, called a segment address, of which the remaining four least significant bits are all zeros.

The segment address is always added to a bit offset in the instruction to yield a linear address, which is the same as physical address in this mode. For example, the linear address h can have the segmented addresses 06EFhh, hh, hh, etc.

This could be confusing to programmers accustomed to unique addressing schemes, but it can also be used to advantage, for example when addressing multiple nested data structures. Therefore, real mode can just as well be imagined as having a variable length for each segment, in the range 1 to 65, bytes, that is just not enforced by the CPU.

The leading zeros of the linear address, segmented addresses, and the segment and offset fields are shown here for clarity.

They are usually omitted. Both were packaged in pin DIP packages; even with only 20 address lines, the address and data buses were multiplexed to fit all the address and data lines within the limited pin count. A segment value of 0Ch 12 would give a linear address at C0h in the linear address space. The address offset can then be added to this number.

Such address translations are carried out by the segmentation unit of the CPU. In bit real mode, enabling applications to make use of multiple memory segments in order to access more memory than available in any one 64K-segment is quite complex, but was viewed as a necessary evil for all but the smallest tools which could do with less memory.

The root of the problem is that no appropriate address-arithmetic instructions suitable for flat addressing of the entire memory range are available. The memory model concept derives from the setup of the segment registers. The 's protected mode extends the processor's address space to 2 24 bytes 16 megabytesbut not by adjusting the shift value. Instead, the bit segment registers now contain an index into a table of segment descriptors containing bit base addresses to which the offset is added.

To support old software, the processor starts up in "real mode", a mode in which it uses the segmented addressing model of the This roughly kilobyte region of memory was known as the High Memory Area HMAand later versions of DOS could use it to increase the available "conventional" memory i.

With the addition of the HMA, the total address space is approximately 1. Moreover, it still necessitated dividing memory into 64k segments like was done in real mode.October 07, Memory Segmentation Two type of memory organisations are commonly used.

In linear addressing the entire memory space is available to the processor in one linear array. In the segmented addressing, on the other hand, the available memory space is divided into " chunks " called segments. Such a memory is known as segmented memory. In system the available memory space is 1Mbytes.

This memory is divided into number of logical segments. Each segment is 64 K bytes in size and addressed by one of the segment registers. To address a specific memory location within a segment we need an offset address. The offset address is also bit wide and it is provided by one of the associated pointer or index register.

Memory Segmentation. The four can overlap for small programs.

memory segmentation in 8086

In a minimum system all four segments can start at the address H. Advantages of memory Segmentation. It allows the memory addressing capacity to be 1 Mbyte even though the address associated with individual instruction is only bit.

It allows instruction code, data, stack, and portion of program to be more than 64 KB long by using more than code, data, stack segment, and extra segment. It facilitates use of separate memory areas for program, data and stack. It permits a program or its data to be put in different areas of memory, each time the program is executed i. The generates this address using the contents of segment register and the offset register associated with it.

Let us see how access byte within the code segment. We know that CS register holds base address of the code segment.If we can't tunnel through the Earth, how do we know what's at its center? What are the advantages of memory segmentation in the microprocessor? What evidence does Coutu use to support her claim that improvisation requires resilience. A lady introduce her husband's name with saying by which can stop or move train what is that name.

All Rights Reserved. The material on this site can not be reproduced, distributed, transmitted, cached or otherwise used, except with prior written permission of Multiply. Hottest Questions. Previously Viewed. Unanswered Questions. Intel and Wiki User There are four bit segment registers that allowed the CPU to access one megabyte of memory in an unusual way. The byte separation between segment bases due to the 4-bit shift was called a paragraph.

Although considered complicated and cumbersome by many programmers, this scheme also had advantages; a small program less than 64 kilobytes could be loaded starting at a fixed offset such as 0 in its own segment, avoiding the need for relocation, with at most 15 bytes of alignment waste.

memory segmentation in 8086

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The advantages of the microprocessor was the processor was small enough for the individual user. The disadvantage of the processor was the limited uses. Each segment register allows access to one of 64k 64kb segments, each overlapping by 16 bytes, with the total addressibility being 1mb.

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It only takes a minute to sign up. If the external memory 1 MB in based system is segmented into code, data, stack and extra which are all 64 kB, what do we do with the rest of the memory? Does it go waste? You set a "segment pointer" which defines where a segment starts.

It acts as an address offset, which is added to the internal bit address of the program counter or other indexing register.

memory segmentation in 8086

Changing the segment pointers is a trivial matter, so although you can only access 64KiB at a time, you can move that 64KiB window around at will to access the whole 1MiB of memory space. Also note that since the had a bit addressing scheme, those segment offsets overlapped every 16 bytes. Number of segment determines the place in the memory. Segment 0 starts at the physical 0 address of the memory. Segment 1 starts 0x10 bytes from the beginning, segment 2 at 0x20, etc. Byte-grained addresses are obtained with pointer regiters: IP instruction pointerSP stack pointer and BP base pointer.

If you operate on data without explicitly specifying the segment, DS is the default at least in Turbo Assembler notation. For example:. You cannot assign a value to a segment register directly. You have to do it through general registers, e. Sign up to join this community. The best answers are voted up and rise to the top. Home Questions Tags Users Unanswered. Asked 5 years, 5 months ago. Active 5 years, 5 months ago.

Viewed 2k times. Welcome to the 's! RAM is internal. Maybe you are confused with extended memory. Active Oldest Votes. Those segments can move though. Majenko Majenko Yes, segments start each 0x10 bytes but are 64k long, which means they overlap a lot. For example: mov cx, [bp] is the same as: mov cx, ds:[bp] I'm not sure about the exact syntax it was some 15 years ago since I used it. Namely, if you override segment, the assembler will generate the corresponding segment override prefix, otherwise it generates instruction without prefix, and this effectively makes ds default for instructions which do obey this principle.

There's no such mode of addressing like [ax]. Sign up or log in Sign up using Google. Sign up using Facebook. Sign up using Email and Password. Post as a guest Name. Email Required, but never shown. The Overflow Blog.By using our site, you acknowledge that you have read and understand our Cookie PolicyPrivacy Policyand our Terms of Service. The dark mode beta is finally here. Change your preferences any time. Stack Overflow for Teams is a private, secure spot for you and your coworkers to find and share information.

Not getting the importance of segmentation. Is it for managing more memory? The instruction set used in is a bit instruction set. This means that a register can only store values in the range 0x to 0xFFFF, and instructions mostly only did bit operations bit addition, bit subtraction, etc.

Segmentation was a way to allow the bit CPU to support a larger address space. These ideas led to the ill-fated iAPX CPU; but also led to the idea of associating protection attributes and limits to the segments that already had, which resulted in the "protected mode" introduced with and extended in Essentially; the original reason for advantage of segments was to increase the address space without the cost of a bit instruction set, etc ; and things like protection and memory management were retro-fitted afterwards and then barely used by software before being abandoned in favour of paging.

Learn more. Asked 2 years, 3 months ago. Active 4 months ago. Viewed times. Active Oldest Votes. Brendan Brendan Answer Memory size is divided into segments of various sizes. A segment is just area in memory. Process of dividing memory in this way is called segmentation.

Advantages of memory segmentation in 8086

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memory segmentation in 8086

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